发明名称 Forwarding condition information from first processing circuitry to second processing circuitry
摘要 A data processing apparatus comprises first and second processing circuitry. A conditional instruction executed by the second processing circuitry may have an outcome which is dependent on one of a plurality of sets of condition information maintained by the first processing circuitry. A first forwarding path can forward the sets of condition information from the first processing circuitry to a predetermined pipeline stage of a processing pipeline of the second processing circuitry. A request path can transmit a request signal from the second processing circuitry to the first processing circuitry, the request signal indicating a requested set of condition information which was not yet valid when a conditional instruction was at the predetermined pipeline stage. A second forwarding path may forward the requested set of condition information to a subsequent pipeline stage when the information becomes valid.
申请公布号 US9170819(B2) 申请公布日期 2015.10.27
申请号 US201313737137 申请日期 2013.01.09
申请人 ARM Limited 发明人 Chaussade Nicolas;Scalabrino Luca;Arsanto Frederic Jean Denis;Airaud Cedric Denis Robert
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. A data processing apparatus comprising: first processing circuitry configured to execute program instructions and to maintain a plurality of sets of condition information for indicating characteristics of the outcomes of the program instructions; second processing circuitry comprising a processing pipeline having a plurality of pipeline stages, wherein the second processing circuitry is configured to execute at least one conditional instruction having an outcome dependent on one of the plurality of sets of condition information maintained by the first processing circuitry; a first forwarding path configured to forward sets of condition information from the first processing circuitry to a predetermined pipeline stage of the processing pipeline of the second processing circuitry; a request path configured to transmit a request signal from the second processing circuitry to the first processing circuitry, the request signal for indicating a requested set of condition information which was not yet valid when a conditional instruction dependent on the requested set of condition information was at the predetermined pipeline stage; and a second forwarding path, wherein in response to the requested set of condition information becoming valid, the first processing circuitry is configured to forward the requested set of condition information via the second forwarding path to a subsequent pipeline stage of the processing pipeline of the second processing circuitry.
地址 Cambridge GB