Data processing system having integrated pipelined array data processor

摘要

A data processing system having a data processing core and integrated pipelined array data processor and a buffer for storing list of algorithms for processing by the pipelined array data processor.

主权项

1. A data processing system, comprising:
a memory; a single integrated circuit, having
a data processor core;an integrated array data processor;
the integrated array data processor having
i) an array of arithmetic execution units arranged to execute one or more algorithms in parallel; andii) an algorithm loader connected to the array of arithmetic execution units, wherein an algorithm comprises a set of instructions for joint execution; anda joint cache shared between the data processor core and the array data processor; the joint cache connected to the memory; the single integrated circuit further including:
an algorithm list buffer connected to both the data processor core and the algorithm loader.