发明名称 MULTI-BRANCH OUTPHASING SYSTEM AND METHOD
摘要 A multi-level, multi-branch outphasing amplifier (20-1) includes a first branch group circuit (22-1) including a first branch circuit (11) receiving a first RF input signal (S1(t)) and first control information (S11—Ctrl=VDD) and a second branch circuit (12) receiving the first input signal and second control information (S12—Ctrl). Each of the first (11) and second (12) branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit (12) remains on. A second branch group circuit (22-2) includes a third branch circuit (21) receiving a second RF input signal (S2(t)) and third control information (S21—Ctrl=VDD) and a fourth branch circuit (22) receiving the second input signal (S2(t)) and fourth control information (S22—Ctrl). Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner (24) combines output signals of the power amplifiers to produce an output signal (SOUT(t)).
申请公布号 US2015303961(A1) 申请公布日期 2015.10.22
申请号 US201414255164 申请日期 2014.04.17
申请人 Texas Instruments Incorporated 发明人 Banerjee Aritra;Hezar Rahmi;Ding Lei;Schemm Nathan Richard
分类号 H04B1/16;H04B1/12;H04B1/18 主分类号 H04B1/16
代理机构 代理人
主权项 1. A multi-level, multi-branch outphasing amplifier comprising: (a) a first branch group circuit including a first branch circuit receiving an RF first input signal and first control information and a second branch circuit receiving the first input signal and second control information, each of the first and second branch circuits including a corresponding power amplifier, the second control information enabling the second branch circuit to be selectively switched on or off while the first branch circuit remains in an on condition; (b) a second branch group circuit including a third branch circuit receiving an RF second input signal and third control information and a fourth branch circuit receiving the second input signal and fourth control information, each of the third and fourth branch circuits including a corresponding power amplifier, the fourth control information enabling the fourth branch circuit to be selectively switched on or off while the fourth branch circuit remains in an on condition; and (c) combiner circuitry for combining output signals of the power amplifiers and producing an output signal across a load.
地址 Dallas TX US