System on chip fault detection

摘要

The invention relates to a method for fault identification in a System-on-Chip (SoC) consisting of a number of IP cores, wherein each IP core is a fault containment unit, and where the IP cores communicate with one another by means of messages via a Network-on-Chip, and wherein an excellent IP core provides a TRM (Trusted Resource Monitor), wherein a faulty control message which is sent from one non-privileged IP core to another non-privileged IP core is identified and projected by an (independent) fault container unit, as a result of which this faulty control message cannot cause any failure of the message receiver.

主权项

1. A system on chip (SoC) comprising:
a number of non-privileged IP cores configured to communicate using messages via a network on chip, each non-privileged IP core being a fault containment unit, and a privileged IP core that is a fault containment unit and a trusted resource monitor (TRM), wherein a faulty control message that is sent from a non-privileged IP core to another non-privileged IP core is detected and discarded by the privileged IP core so that this faulty control message cannot cause failure of the message receiver.