Hybrid queue for storing instructions from fetch queue directly in out-of-order queue or temporarily in in-order queue until space is available

摘要

A queuing apparatus having a hierarchy of queues, in one of a number of aspects, is configured to control backpressure between processors in a multiprocessor system. A fetch queue is coupled to an instruction cache and configured to store first instructions for a first processor and second instructions for a second processor in an order fetched from the instruction cache. An in-order queue is coupled to the fetch queue and configured to store the second instructions accepted from the fetch queue in response to a write indication. An out-of-order queue is coupled to the fetch queue and to the in-order queue and configured to store the second instructions accepted from the fetch queue in response to an indication that space is available in the out-of-order queue, wherein the second instructions may be accessed out-of-order with respect to other second instructions executing on different execution pipelines.

主权项

1. A queuing apparatus having a hierarchy of queues, the queuing apparatus comprising:
a fetch queue coupled to an instruction cache and configured to store first instructions for a first processor and second instructions for a second processor in an order fetched from the instruction cache; an in-order queue coupled to the fetch queue and configured to store the second instructions accepted from the fetch queue in response to a write indication, wherein the second instructions are maintained in the order fetched; and an out-of-order queue coupled to the fetch queue and to the in-order queue and configured to store the second instructions accepted from the fetch queue in response to an indication that space is available in the out-of-order queue and there are no pending second instructions stored in the in-order queue, wherein second instructions without dependency conflicts are accessed for execution out-of-order with respect to other second instructions executing on different execution pipelines, the write indication is generated when the out-of-order queue is full and the in-order queue is not full, and wherein the second instructions are stored in the in-order queue to provide additional capacity for queue storage associated with the second processor when the out-of-order queue is full.