非挥发性半导体记忆装置;NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE

摘要

本发明揭示一种非挥发性半导体记忆装置，其包含：一单元阵列层，其包含一第一导线、一记忆单元及一第二导线；及一控制电路。当执行设定操作以在该记忆单元之一电阻值变为低于一预定电阻值以前将该记忆单元设定为一低电阻状态时，该控制电路重复：施加一第一电压以设定该记忆单元；及一验证读取以验证该记忆单元之该电阻值已变为低于该预定电阻值。在该验证读取之后，该控制电路在施加紧随之该第一电压之前将具有与该第一电压不同之一极性之一第二电压施加至该记忆单元。; and a verify read verifying that the resistance value of the memory cell has become lower than the predetermined resistance value. After the verify read, the control circuit applies a second voltage having a different polarity from the first voltage to the memory cell before applying the first voltage that follows.