Floorplan-Optimized Stacked Image Sensor And Associated Methods

摘要

A floorplan-optimized stacked image sensor and a method for designing the sensor are disclosed. A sensor layer includes multiple PSAs partitioned into PSA groups. A circuit layer includes multiple analog-to-digital converters each communicatively coupled to a different PSA. Each analog-to-digital converter (ADC) is semi-aligned to the PSA group associated with the PSA to which it is communicatively coupled. The floorplan of ADCs maximizes contiguous global-based space on the circuit layer uninterrupted by an ADC. The resulting circuit layer floorplan has one or more global-based spaces interleaved with one or more local-based spaces containing ADCs.

主权项

1. A floorplan-optimized stacked image sensor, comprising:
a sensor layer having a plurality of pixel sub-arrays (PSAs) that form a contiguous two-dimensional pixel array; a circuit layer having a local-based space with a plurality of analog-to-digital converters (ADCs) interleaved with at least one contiguous global-based space uninterrupted by an ADC; the ADCs being positioned to maximize the at least one contiguous global-based space.