Chip package and method for forming the same

摘要

Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer.

主权项

1. A chip package, comprising:
a chip, comprising:
a semiconductor substrate having a first surface and a second surface;a device region formed in the semiconductor substrate;a dielectric layer disposed on the first surface; anda conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed on the chip, wherein a width of the cover substrate is less than that of the chip; and a spacer layer disposed between the chip and the cover substrate wherein the spacer layer is made of a non-electrically conductive material, wherein a cavity is created and surrounded by the spacer layer, the chip and the cover substrate on the device region, and wherein the spacer layer directly contacts the chip, and no adhesion glue is disposed between the chip and the spacer layer.