发明名称 All invalidate approach for memory management units
摘要 An input/output memory management unit (IOMMU) having an “invalidate all” command available to clear the contents of cache memory is presented. The cache memory provides fast access to address translation data that has been previously obtained by a process. A typical cache memory includes device tables, page tables and interrupt remapping entries. Cache memory data can become stale or be compromised from security breaches or malfunctioning devices. In these circumstances, a rapid approach to clearing cache memory content is provided.
申请公布号 US9152571(B2) 申请公布日期 2015.10.06
申请号 US201213563253 申请日期 2012.07.31
申请人 ATI Technologies ULC;Advanced Micro Devices, Inc. 发明人 Kegel Andrew G.;Hummel Mark D.;Asaro Anthony
分类号 G06F12/10 主分类号 G06F12/10
代理机构 Volpe and Koenig, P.C. 代理人 Volpe and Koenig, P.C.
主权项 1. A method comprising: caching information in a cache for a memory management unit of a computer system, wherein the management unit comprises a cache and non-cached registers; detecting an abnormal event; storing control and configuration information of the memory management unit in the non-cached registers; and in response to a single command generated in response to the abnormal event, clearing at least a subset of the information in the cache in response to the detecting the abnormal event, and preserving the control and configuration information in the non-cached registers, wherein the caching, storing, detecting and clearing are performed by one or more digital devices.
地址 Markham, Ontario CA