发明名称 Wafer level package having cylindrical capacitor and method of fabricating the same
摘要 Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode. A method of fabricating the wafer level package having a cylindrical capacitor is also provided.
申请公布号 US9153641(B2) 申请公布日期 2015.10.06
申请号 US201313752238 申请日期 2013.01.28
申请人 Samsung Electro-Mechanics Co., Ltd. 发明人 Lee Seung Seoup;Yim Soon Gyu
分类号 H01L29/92;H01L21/02;H01L49/02;H01L23/522;H01L23/31 主分类号 H01L29/92
代理机构 NSIP Law 代理人 NSIP Law
主权项 1. A wafer level package having a cylindrical capacitor, comprising: a wafer chip including a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad; a redistribution layer connected to the bonding pad and extending to one side of the insulating layer; a cylindrical outer electrode connected to the redistribution layer and having a center opening therein; a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode; a dielectric layer formed between the outer electrode and the inner electrode; and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer, wherein a lower surface of the inner electrode is connected to a peripheral wiring layer which is formed on the insulating layer and which extends from outside the outer electrode into a center opening of the outer electrode so as not to be connected to the outer electrode.
地址 Suwon-si KR