摘要 |
The invention provides a method for processing vertical gate patterns while reducing the Si substrate recess dimension caused by overetching. The invention provides a dry etching method for processing a gate pattern by performing a main etching process (b) and then an overetching process on a gate pattern layer 12 of a semiconductor substrate 10, wherein the overetching process (c) is performed using a composite gas having added to an etching gas containing HBr gas a gas represented by a general formula of CxHy or at least one gas selected from CO and CO<SUB>2 </SUB>gases.
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