发明名称 |
PACKAGE-ON-PACKAGE WITH CAVITY FORMED AND ITS MANUFACTURING METHOD |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide package-on-package and its manufacturing method. <P>SOLUTION: A manufacturing method of package-on-package with cavities formed comprises: a stage of forming a first upper-layer cavity 475 in one surface of an upper-layer substrate; a stage of mounting an upper-layer semiconductor chip 480 on the other surface of the upper-layer substrate; a stage of forming a lower-layer cavity in one surface of the lower-layer substrate; a stage of mounting a lower-layer semiconductor chip 435 in the lower-layer cavity formed in the lower-layer substrate; and a stage of stacking the upper-layer substrate on the lower-layer substrate in such a manner that a part of the lower-layer semiconductor chip is accommodated in the first upper-layer cavity. Since the cavity is formed in the upper and lower layer substrates to accommodate the semiconductor chip mounted on the lower-layer substrate in the cavity, the package-on-package with the cavities formed and its manufacturing method can reduce the entire thickness of the package. <P>COPYRIGHT: (C)2007,JPO&INPIT |
申请公布号 |
JP2007221118(A) |
申请公布日期 |
2007.08.30 |
申请号 |
JP20070013284 |
申请日期 |
2007.01.24 |
申请人 |
SAMSUNG ELECTRO-MECHANICS CO LTD |
发明人 |
MOK JEE SOO;RYU CHANG-SUP;PARK DON-JIN |
分类号 |
H01L25/10;H01L25/11;H01L25/18 |
主分类号 |
H01L25/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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