METHOD FOR FORMING DUAL GATE OF SEMICONDUCTOR DEVICE
摘要
<p>A method for forming a dual gate of a semiconductor device is provided to obtain stable device characteristics by preventing the formation of a depletion layer in a polysilicon layer under a following heat treatment using multi-step boron ion implantations and CMP. A semiconductor substrate(10) is defined with a first region for an NMOS transistor and a second region for a PMOS transistor. A gate insulating layer(11) is formed on the entire surface of the resultant structure. A gate conductive layer doped with an N type dopant is deposited on the gate insulating layer. Multi-step ion implantations are performed on the resultant structure by using a mask capable of enclosing the first region alone to implant a P type dopant into the gate conductive layer of the second region. A planarizing process is performed on the resultant structure to remove a damaged layer(16) from the gate conductive layer of the second region.</p>
申请公布号
KR20070088926(A)
申请公布日期
2007.08.30
申请号
KR20060018803
申请日期
2006.02.27
申请人
HYNIX SEMICONDUCTOR INC.
发明人
LEE, SEUNG RYONG;SUNG, MIN GYU;LIM, KWAN YONG;CHO, HEUNG JAE;YANG, HONG SEON