发明名称 |
Non-volatile memory cell for shift register, has bistable flip-flop for volatile storage of binary information, and single binary programmable resistor securing information stored in flip-flop, during transition into power-down mode |
摘要 |
<p>The cell includes a bistable flip-flop realized by two cross-coupled inverters (INV1, INV2) for volatile storage of binary information. The binary information is stored in the form of potentials of memory nodes (K1, K2). A single binary programmable resistor (R1) secures the information stored in the flip-flop, during the transition into a power-down mode. Two switches (Sw3, Sw4) are provided for securing the binary information, where the switches serve for PC-reset operation and save-operation, respectively. Switches (Sw1, Sw2) are used for retrieving the binary information from the resistor. An independent claim is also included for a shift register including a non-volatile memory cell.</p> |
申请公布号 |
DE102005030142(B3) |
申请公布日期 |
2006.12.21 |
申请号 |
DE20051030142 |
申请日期 |
2005.06.28 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
SCHOENAUER, TIM;NIEDERMEIER, THOMAS;KUND, MICHAEL;BERTHOLD, JOERG |
分类号 |
G11C16/02;G11C13/00 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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