发明名称 METHOD FOR CONSTITUTING MASTER SLICE INTEGRATED CIRCUIT
摘要 PURPOSE:To render ICs identifiable in terms of their types even after assembly by a method wherein two or more master slice integrated circuits are provided with resistance elements presenting values proper to the respective integrated circuits and one end of a resistance element is connected to the substrate potential and the other to a pad. CONSTITUTION:Integrated circuits (ICs) A-D are master slice ICs different from each other. Resistance elements 1a-1d are resistors presenting different resistance values. A end of a resistor is connected to a pad and the other to the substrate potential. For example, the resistor 1a is set to present 1kOMEGA, 1b 2kOMEGA, 1c 3kOMEGA, and 1d 4kOMEGA. When a resistance value of 1kOMEGA is obtained from one of the resistors after assembling the ICs A-D, the integrated circuit including the resistor is identified as the IC A. In this way, an IC may be named out of a multiple types of master slice ICs by knowing the value a resistor presents.
申请公布号 JPS63122242(A) 申请公布日期 1988.05.26
申请号 JP19860270169 申请日期 1986.11.12
申请人 NEC CORP 发明人 AYABE TOSHIJI
分类号 H01L21/82;H01L21/822;H01L27/04;H01L27/118 主分类号 H01L21/82
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