| 摘要 |
An IP2 tuning circuit (404, 1004, 1104 and 1404) for tuning the IP2 of a mixer (414 and 415) to minimize second order intermodulation distortion (IMD2) in a receiver (402, 1002, 1102 and 1402) of a transceiver (401, 1001, 1101 and 1401). An operating characteristic of the mixer related to IMD2 is changeable by changing a value of a setting of the mixer. Two tones outside a bandpass of the receiver are injected into the mixer and a calibration tone within the bandpass is produced as a result of IMD2. Alternatively, a DSSS signal is injected into the mixer and the calibration tone is produced at a chip rate of the DSSS signal. The power of the calibration tone is measured at a plurality of values of the settings. Alternatively, a four-level PN DSSS signal of known content is injected into the mixer, and a two-level PN DSSS signal of known content produced therefrom is correlated with a two-level PN DSSS signal of known content produced by a squaring circuit (1468).
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