发明名称 READ CIRCUIT, VARIABLE RESISTIVE ELEMENT DEVICE, AND IMAGING APPARATUS
摘要 PROBLEM TO BE SOLVED: To prevent a gate voltage of an integration transistor of a bias circuit from excessively increasing in a read circuit using the integrated circuit to detect current. SOLUTION: The read circuit 10 includes: an integration sample hold circuit 23 whose input is connected to an integration node N<SB>INT</SB>; and a bias circuit 21 connected between a connection node N<SB>BOUT</SB>to which a thermoelectric conversion element 2 is connected and the integration node N<SB>IHT</SB>. The bias circuit 21 includes: an integration transistor 31 whose source and drain are connected to the connection node N<SB>BOUT</SB>and the integration node N<SB>INT</SB>, respectively; an operational amplifier 32 whose output is connected to a gate of the integration transistor 31, to whose first input a bias voltage is supplied and whose second input is connected to the source of the integration transistor 31; and a diode element 35 connected between the gate and the source of the integration transistor 31. The diode element 35 clips a gate-source voltage of the integration transistor 31. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009164722(A) 申请公布日期 2009.07.23
申请号 JP20070339617 申请日期 2007.12.28
申请人 NEC ELECTRONICS CORP 发明人 ENDO TSUTOMU
分类号 H03K17/00 主分类号 H03K17/00
代理机构 代理人
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