NON-VOLATILE MEMORY WITH REDUCED CHARGE FLUENCE

摘要

A method including performing a program/erase cycle on a first non-volatile memory (NVM) bit (114) of an integrated circuit (10) using a first fluence, wherein the first NVM bit has a first transconductance is provided. The method further includes performing a program/erase cycle on a second NVM bit (112) of the integrated circuit using a second fluence, wherein the second NVM bit has a second transconductance, and wherein the first transconductance is greater than the second transconductance and the second fluence is greater than the first fluence.