PHASE CHANGE MEMORY DEVICE

摘要

A phase change memory device is provided to reduce write time by writing a plurality of cells without increase of write current. A base terminal of a selection switch(SW0) is connected to a word line(WL). A collector terminal of the selection switch is connected to a read / write bit line(RWBL). An emitter terminal of the selection switch is connected to a unit cell(UC), and each unit cell comprises one phase change resistance cell(PCR1) and one switching element(N1). One electrode of the phase change resistance cell is connected to a source terminal of the switching element. The other electrode of the phase change resistance cell is connected to a drain terminal of the switching element. The switching element(N1~N4) corresponds to a plurality of bit lines(BL1~BLn) with one to one.