发明名称 SIGNAL PROCESSING DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To efficiently perform processing for generating a dot clock based on a horizontal synchronization signal to reproduce an input video signal even if the format of the input video signal is unknown. <P>SOLUTION: A first candidate selection portion 130 selects formant candidates based on the horizontal synchronizing cycle and the vertical synchronizing cycle of the input video signal. A second candidate selection portion 140 selects formats having the tolerance ranges for the horizontal synchronizing cycles within which the horizontal synchronizing cycle of the input video signal falls as format candidates. A format decision portion 160 determines the format of the input video signal from format candidates from the first candidate selection portion 130 when format candidate (s) is obtained by the first candidate selection portion 130, and determines the format of the input video signal from format candidates selected by the second candidate selection portion 140 when no format candidate is obtained by the first candidate selection portion 130. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009080171(A) 申请公布日期 2009.04.16
申请号 JP20070247418 申请日期 2007.09.25
申请人 NEC ELECTRONICS CORP 发明人 MATSUI TAKEO
分类号 G09G5/18;G09G5/00;H04N5/66 主分类号 G09G5/18
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