发明名称 Method for Manufacturing Hetero-Bonded Wafer
摘要 A method for manufacturing a hetero-bonded wafer having a large mismatch of thermal expansion coefficient comprises forming a wafer bonding means and an electrical interconnection means on at least one bonding surface of two wafers to be bonded with each other, forming grooves in the bonding surface of one wafer along dicing lines with an interval between the grooves being equal to or an even multiple of a die width, bonding the two wafers at a temperature less than 200° C. thinning a back side of the grooved wafer such that at least a portion of the grooves is exposed, and rebonding the bonded wafer pair at an elevated temperature higher than the first bonding temperature. The method for manufacturing a hetero-bonded wafer can avoid wafer level bow/warp and also reduce debonding and cracking in individual segments induced by thermal stress due to a mismatch of thermal expansion coefficient. Embodiments of the method are useful for wafer level packaging and the fabrication of hybrid devices by heterogeneous wafer bonding.
申请公布号 US2010308455(A1) 申请公布日期 2010.12.09
申请号 US20100796798 申请日期 2010.06.09
申请人 发明人 KIM YOUNG HAE;LEE SANG HWAN
分类号 H01L23/48;H01L21/302;H01L21/50 主分类号 H01L23/48
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