发明名称 |
Method and structure for self aligned formation of a gate polysilicon layer |
摘要 |
A method for processing semiconductor devices includes providing a semiconductor substrate. The method includes forming a pad oxide layer overlying the substrate and forming a silicon nitride layer overlying the pad oxide layer. The method includes forming a trench region extending through an entirety of a portion of the silicon nitride layer and extends into a depth of the semiconductor substrate. The method also includes filling the trench region with an oxide material. The oxide material extends from a bottom portion of the trench region to an upper surface of the silicon nitride layer. The method includes planarizing the oxide material and selectively removing the silicon nitride layer to form an isolation structure. A polysilicon material is deposited overlying the isolation structure. The polysilicon material is planarized to expose a top portion of the isolation structure and form a first electrode and a second electrode structures separated by a portion of the isolation structure.
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申请公布号 |
US7807532(B2) |
申请公布日期 |
2010.10.05 |
申请号 |
US20070623048 |
申请日期 |
2007.01.12 |
申请人 |
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION |
发明人 |
JIANG LI;SHAO YING;PENG LIBBERT;WU AUTER |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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