发明名称 NON-VOLITILE MEMORY DEVICE
摘要 PURPOSE: A nonvolatile memory device is provided to reduce parasitic capacitance by arranging floated bit lines around a bit line to which a program basis voltage is applied. CONSTITUTION: A first source selecting unit(103A) transmits a boosting voltage applied to a common source line to a first cell array in response to a first source selection signal. A first drain selecting unit(101A) disconnects the bit line from the first cell array in response to a first drain selection signal. A second source selecting unit disconnects the common source line from a second cell array. A second drain selecting unit(101B) transmits a program basis voltage to the second array through a second bit line in response to a second drain selection signal.
申请公布号 KR20120079501(A) 申请公布日期 2012.07.13
申请号 KR20110000705 申请日期 2011.01.05
申请人 SK HYNIX INC. 发明人 YANG, CHANG WON;YANG, IN GON
分类号 G11C16/06;G11C16/24;G11C16/30 主分类号 G11C16/06
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