发明名称 |
Address output timing control circuit of semiconductor apparatus |
摘要 |
Various embodiments of a control circuit for controlling an address output timing of a semiconductor device are disclosed. In one exemplary embodiment, the circuit may include: a timing signal generation unit configured to decode operation specification information of a semiconductor device and generate a timing signal by delaying a read command or a write command based on a decoding result of the operation specification information; a storage control signal generation unit configured to generate a storage control signal in response to the read command or the write command; an output control signal generation unit configured to generate an output control signal in response to the timing signal; and a storage/output unit configured to store an address in response to the storage control signal, and output the stored address as a timing-adjusted address in response to the output control signal. |
申请公布号 |
US8406079(B2) |
申请公布日期 |
2013.03.26 |
申请号 |
US20100970228 |
申请日期 |
2010.12.16 |
申请人 |
KIM YOUNG PARK;CHUN DUK SU;SK HYNIX INC. |
发明人 |
KIM YOUNG PARK;CHUN DUK SU |
分类号 |
G11C8/18 |
主分类号 |
G11C8/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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