发明名称 Process For Fabricating Multi-Die Semiconductor Package With One Or More Embedded Die Pads
摘要 To avoid shorts between adjacent die pads in mounting, a multi-die semiconductor package to a printed circuit board (PCB), one of the die pads is embedded in the polymer capsule, while the other die pad is exposed at the bottom of the package to provide a thermal escape path to the PCB. This arrangement is particularly useful when one of the dice in a multi-die package generates more heat than another die in the package. A process for fabricating the package includes a partial etch that defines the bottom surface of the embedded die pad and may include a through-etch that leaves one or more of the contacts or leads integrally connected to the embedded die pad.
申请公布号 US2013252377(A1) 申请公布日期 2013.09.26
申请号 US201313897423 申请日期 2013.05.19
申请人 WILLIAMS RICHARD K.;LIN KENG HUNG;ADVANCED ANALOGIC TECHNOLOGIES (HONG KONG) LIMITED;ADVANCED ANALOGIC TECHNOLOGIES INCORPORATED 发明人 WILLIAMS RICHARD K.;LIN KENG HUNG
分类号 H01L25/00 主分类号 H01L25/00
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