Digital system and a method for error detection thereof

摘要

The subject matter hereof relates to error detection. Various example embodiments for error defection are disclosed. In an example method of error detection in a Module UnderTest (MUT), a parity signal representing the parity of an MUT output is compared to a parity signal representing the parity of an errorless MUT output. In an example system, an Actual Parity Generator provides a parity signal representing the parity of on MUT output, a State Parity Generator provides a parity signal representing the parity of an errorless MUT output, and a comparator compares these two parity signals.