发明名称 AMPLIFICATION CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide an amplification circuit that reduces a charge injection charging error.SOLUTION: In an amplification circuit 100 that includes a main amplification circuit 10 and an auto-zero amplification circuit 11 and performs an offset correction to the main amplification circuit 10, the main amplification circuit 10 comprises a four-input differential amplification circuit having a non-inverting input terminal (+) for inputting an analog signal (VIN+), an inverting input terminal (-) for inputting an analog signal (VIN-), a non-inverting input terminal for offset correction (Z+) for inputting a non-inverted output from a non-inverting output terminal (E+) of the auto-zero amplification circuit 11, and an inverting input terminal for offset correction (Z-) for inputting an inverted output from an inverting output terminal (E-) of the auto-zero amplification circuit 11.</p>
申请公布号 JP2015019280(A) 申请公布日期 2015.01.29
申请号 JP20130145798 申请日期 2013.07.11
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 INADA NORICHIKA
分类号 H03F3/34;H03F3/45 主分类号 H03F3/34
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