Thin film transistor, method of manufacturing the thin film transistor and organic light emitting display device have the thin film transistor

摘要

A thin film transistor for an organic light emitting display device is disclosed. In one embodiment, the thin film transistor includes: a substrate, an active layer formed over the substrate, wherein the active layer is formed of an oxide semiconductor, a gate insulating layer formed over the substrate and the active layer, and source and drain electrodes formed on the gate insulating layer and electrically connected to the active layer. The transistor may further include a gate electrode formed on the gate insulating layer and formed between the source and drain electrodes, wherein the gate electrode is spaced apart from the source electrode so as to define a first offset region therebetween, and wherein the gate electrode is spaced apart from the drain electrode so as to define a second offset region therebetween. The transistor may further include a passivation layer formed on i) the gate insulating layer, ii) the source and drain electrodes and iii) the gate electrode; and at least one auxiliary gate electrode formed on the passivation layer, wherein at least a portion of the auxiliary gate electrode is located directly above the first and second offset regions.

主权项

1. A thin film transistor, comprising:
a substrate; an active layer formed over the substrate, wherein the active layer is formed of an oxide semiconductor; a gate insulating layer formed over the substrate and the active layer; source and drain electrodes formed on the gate insulating layer and electrically connected to the active layer; a gate electrode formed on the gate insulating layer and formed between the source and drain electrodes, wherein the gate electrode is spaced apart from the source electrode, wherein a first gap between the gate electrode and the source electrode is defined as a first offset region, wherein the gate electrode is spaced apart from the drain electrode, and wherein a second gap between the gate electrode and the drain electrode is defined as a second offset region; a passivation layer formed on i) the gate insulating layer, ii) the source and drain electrodes and iii) the gate electrode; and at least one auxiliary gate electrode formed on the passivation layer, wherein the auxiliary gate electrode comprises first and second auxiliary gate electrodes, wherein at least a portion of the first auxiliary gate electrode is located directly above the first offset region, wherein at least a portion of the second auxiliary gate electrode is located directly above the second offset region, and wherein the first and second auxiliary gate electrodes are formed on the same layer.