发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
摘要 According to one embodiment, a nonvolatile semiconductor memory device includes an interconnect layer, a stacked body, an insulating layer, a semiconductor pillar, a charge storage layer and a first conductive unit. The stacked body is separated from the interconnect layer in a first direction. The stacked body includes a memory unit and a selection gate provided between the memory unit and the interconnect layer. The insulating layer is provided between the interconnect layer and the stacked body. The semiconductor pillar pierces the stacked body in the first direction. The charge storage layer is provided between the semiconductor pillar and the memory unit. The first conductive unit connects the semiconductor pillar and the interconnect layer. A width of the first conductive unit along a second direction perpendicular to the first direction is wider than a width of the semiconductor pillar along the second direction.
申请公布号 US2015270282(A1) 申请公布日期 2015.09.24
申请号 US201514613489 申请日期 2015.02.04
申请人 Kabushiki Kaisha Toshiba 发明人 KOSHIISHI Kenji;KATAOKA Junji
分类号 H01L27/115;H01L29/792;H01L29/66 主分类号 H01L27/115
代理机构 代理人
主权项 1. A nonvolatile semiconductor memory device, comprising: an interconnect layer; a stacked body separated from the interconnect layer in a first direction, the stacked body including a memory unit including a plurality of electrode films and a plurality of inter-electrode insulating films stacked alternately in the first direction, anda selection gate provided between the memory unit and the interconnect layer; an insulating layer provided between the interconnect layer and the stacked body; a semiconductor pillar piercing the stacked body in the first direction; a charge storage layer provided between the semiconductor pillar and each of the plurality of electrode films; and a first conductive unit connecting the semiconductor pillar and the interconnect layer, a width of the first conductive unit along a second direction perpendicular to the first direction being wider than a width of the semiconductor pillar along the second direction.
地址 Minato-ku JP