发明名称 Device for avoiding hard switching in resonant converter and related method
摘要 A control device that controls a switching circuit and minimizes hard switching that occurs in the switching circuit of a half-bridge resonant converter having a high-side transistor and a low-side transistor. The control device is configured to turn the high-side and low-side transistor on and, so that a square-wave voltage is applied to a primary winding of a transformer. The controller starts the switching of the half-bridge converter by first turning on the low-side transistor for a first time period useful for pre-charging a bootstrap capacitor couplable to the middle point of the half-bridge, and then turning the low-side transistor and the high-side transistor off for a second time period that immediately follows and is longer than the first time period.
申请公布号 US9143046(B2) 申请公布日期 2015.09.22
申请号 US201213416656 申请日期 2012.03.09
申请人 STMicroelectronics S.R.L. 发明人 Adragna Claudio;Novelli Aldo Vittorio;Santoro Christian Leone
分类号 H02M3/335;H02M3/337;H02M1/00 主分类号 H02M3/335
代理机构 Seed IP Law Group PLLC 代理人 Seed IP Law Group PLLC
主权项 1. A control device for controlling a switching circuit of a converter, said switching circuit including a half-bridge having a high-side transistor and a low-side transistor coupled to a bootstrap capacitor, said control device comprising: a controller configured to turn on and turn off high-side and low-side transistors with a first and second output signal, respectively, and to initially turn on the low-side transistor before the high-side transistor is turned on during a first switching cycle of the high-side and low-side transistors; a first timer coupled to a first input of the controller and electrically isolated from the first and second output signals, the first timer configured to provide a first control signal to the controller that initially turns on the low-side transistor for a duration given by a first time period to pre-charge the bootstrap capacitor during the first switching cycle; a second timer coupled to a second input of the controller and electrically isolated from the first and second output signals, the second timer configured to provide a second control signal to the controller that keeps the low-side transistor and the high-side transistor turned off over a second time period during the first switching cycle, the second time period immediately following the first time period and the second time period having a longer duration than the first time period; and wherein the controller is further configured to turn the high-side and low-side transistors on and off independent of the first and second control signals during subsequent switching cycles of the high-side and low-side transistors.
地址 Agrate Brianza IT