发明名称 Nested CRC (cyclic redundancy check) code generation method and device for data transmission error control
摘要 A nested CRC code generation method for data transmission error control, comprising: segmenting the data to be computed, allocating a CRC code computing channel to each of the data segments according to the data type, computing CRC sub-codes by the computing channels, sorting the CRC sub-codes, and generating a nested CRC code by sending the sorted CRC sub-codes to the final CRC code computing channel directly or by using the sorted CRC sub-codes as the new data to be computed, repeating the above CRC sub-code computing process and sending the final sorted CRC sub-codes to the final CRC code computing channel. A nested CRC code generation device for data transmission error control, comprising: a data segmenting module, a computing channel selecting module, a multi-channel CRC code computing module, a data sorting module, a set of registers, a data distributor, a counter and a single-channel CRC code computing module.
申请公布号 US9143276(B2) 申请公布日期 2015.09.22
申请号 US201214117680 申请日期 2012.11.23
申请人 Hua Zhong University of Science and Technology 发明人 Zhou Wenli;Duan Binbin
分类号 H03M13/00;H04L1/00;H03M13/09 主分类号 H03M13/00
代理机构 Hamre, Schumann, Mueller & Larson, P.C. 代理人 Hamre, Schumann, Mueller & Larson, P.C.
主权项 1. A nested CRC code generation method for data transmission error control, comprising: (1) segmenting data to be computed by a data segmenting module, further comprising: (1.1) initializing the data in the data segmenting module to 0, and determining the maximum number of data segments to be N according to the number of calculating channels N, where N is a positive integer; (1.2) generating N+1 pointers (P0, P1, . . . , Pi, . . . , PN) and N pointers (p1, p2, . . . , pi, . . . , pN) for the data segmenting module, where i is a positive integer and is less than or equal to N; dividing the data segmenting module into N data sections by the pointers (P0, P1, . . . , Pi, . . . , PN), each of which can hold a data segment with a data length of Ls; and allocating each of the pointers (p1, p2, . . . , pi, . . . , pN) to each of the data sections according to the sequence of the N data sections, where Ls can be any positive integer; (1.3) assigning fixed values to the pointers (P0, P1, . . . , Pi, . . . , PN), where Pi=Pj−1+Ls, and P0 can be any value, and Pi is fixed during the whole computing process; (1.4) initializing the values of the pointers (p1, p2, . . . , pi, . . . , pN) of the N data sections to the values of the pointers (P0, P1, . . . , Pi, . . . , PN−1); (1.5) filling the data to be computed into the data segmenting module and changing the values of the pointers (p1, p2, . . . , pi, . . . , pN) accordingly; (1.6) segmenting the data to be computed into m data segments by the data segmenting module and sending the value of m to a channel selector and a reverse channel selector; (1.7) transmitting W bits of each of the data segments to each of the m computing channels respectively in each clock cycle via the values of the pointers (p1, p2, p3, . . . , pm) and the number of bits W a computing channel can process in parallel, and decreasing each of the values of the pointers (p1, p2, p3, . . . , pm) by W; and (1.8) checking if the values of the pointers (p1, p2, p3, . . . , pm) equal the values of the pointers (P0, P1, P2, . . . , Pm−1), and proceeding to step (2) if yes, otherwise returning to step (1.7); (2) allocating an appropriate CRC code computing channel to each of the data segments to be computed, further comprising: (2.1) generating a channel selecting table for the channel selector for generating a Qth nested CRC code for the data to be computed of different data types, so as to allocate a corresponding computing channel to each of the data input channels in each of the nested computing processes of the data to be computed of different data types, where Q is a positive integer; (2.2) turning on switches connecting m outputs of the data segmenting module (1, 2, 3, . . . , m) and the channel selector by the channel selector according to the total number of the data segments m transmitted by the data segmenting module; and (2.3) connecting each of the selected m data inputs of the channel selector to a corresponding computing channel according to the channel selecting table; (3) computing a CRC sub-code for each of the data segments to be computed by the corresponding computing channel, further comprising: (3.1) allocating each of generating polynomials (g1(x), g2(x), . . . , gi(x), . . . , gN(x)) to each of the N computing channels correspondingly, where i can be any integer between 1 and N, and different computing channels can have the generating polynomials; (3.2) realizing computing W bits in parallel in each of the computing channels by logic circuits or looking up remainder tables according to the generating polynomials; (3.3) setting an initial value for each of the computing channels according to the generating polynomials, where each computing channel is usually initialized to all 0s or 1s; and (3.4) generating m CRC sub-codes by computing a CRC sub-code for the input data segment of each of the computing channels; (4) sorting the computed CRC sub-codes of the computing channels, further comprising: (4.1) using a same channel selecting table as the channel selector for the reverse channel selector; (4.2) turning on the switches for connecting m CRC sub-code registers (1, 2, 3, . . . , m) and the reverse channel selector by the reverse channel selector according to the total number m of the data segments transmitted by the data segmenting module; (4.3) connecting each of m data outputs of the reverse channel selector to an output of the corresponding computing channel according to the channel selecting table; and (4.4) storing each of the CRC sub-codes computed by the computing channels into a corresponding CRC sub-code register by the corresponding computing channel according to the selecting result of the reverse channel selector to generate a new data string (CRC1, CRC2, . . . , CRCi, . . . , CRCm), where i can be any integer between 1 and m, and CRCi is the computed CRC sub-code for the ith data segment; (5) checking if another multi-channel computing process is required, and returning to step (1) using the computed CRC sub-codes in step (4) as the new data to be computed if yes, otherwise proceeding to step (6), further comprising: (5.1) decreasing a nesting frequency of a CRC code Q by 1; and (5.2) checking if Q equals 0, and proceeding to step (6) if yes, otherwise returning to step (1) using the sorted CRC sub-codes in step (4) as the new data to be computed; and (6) computing a final Qth nested CRC code by a (N+1)th computing channel, further comprising: (6.1) allocating the generating polynomial gN+1(x) to the (N+1)th computing channel; (6.2) realizing computing W bits in parallel in the (N+1)th computing channel by logical circuits or looking up a remainder table according to the generating polynomial; (6.3) setting an initial value for the (N+1)th computing channel, where the initial value of the (N+1)th computing channel is usually set to 0 or 1; and (6.4) generating a final Qth nested CRC code by a last CRC code computing process with sorted Qth computed CRC sub-codes by the (N+1)th computing channels.
地址 Wuhan, Hubei CN