发明名称 SERIAL I/O USING JTAG TCK AND TMS SIGNALS
摘要 The present disclosure describes a novel method and apparatus of using the JTAG TAP's TMS and TCK terminals as a general purpose serial Input/Output (I/O) bus. According to the present disclosure, the TAP's TMS terminal is used as a clock signal and the TCK terminal is used as a bidirectional data signal to allow serial communication to occur between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC.
申请公布号 US2015260790(A1) 申请公布日期 2015.09.17
申请号 US201514728547 申请日期 2015.06.02
申请人 Texas Instruments Incorporated 发明人 Whetsel Lee D.
分类号 G01R31/3177 主分类号 G01R31/3177
代理机构 代理人
主权项 1. An integrated circuit comprising: A. a data source having a data output bus and a control input; B. a data destination having a data input bus and a control input; and C. a serial input/output circuit having a serial data input and a serial data output, the serial input/output circuit including: i. a multiplexer having a first input connected to the data output bus, a second input connected to the serial data input, a third input, an output, a first control input, and a second control input;ii. a flip-flop having an input connected to the output of the multiplexer, a clock input, and having an output connected to the data input bus, connected to the third input of the multiplexer, and coupled to the serial data output; andiii. controller circuitry having a first control output coupled to the control input of the data source and the first control input of the multiplexer, a second control output coupled to the second control input of the multiplexer, and a third control output coupled to the control input of the data destination.
地址 Dallas TX US