发明名称 NON-VOLATILE MEMORY DEVICE
摘要 A nonvolatile memory device according to an embodiment includes: a semiconductor substrate; a memory cell array unit provided on an upper side of the semiconductor substrate; an integrated circuit unit provided between the memory cell array unit and the semiconductor substrate; and a peripheral circuit unit provided on the semiconductor substrate. The integrated circuit unit includes: a first contact electrode electrically connected to one of plurality of first interconnection layers; a second contact electrode connected to the peripheral circuit unit; and a first switching element connected between the first contact electrode and the second contact electrode, and conduction between the first contact electrode and the second contact electrode being controlled by a control circuit unit provided in the peripheral circuit unit.
申请公布号 US2015262671(A1) 申请公布日期 2015.09.17
申请号 US201414471492 申请日期 2014.08.28
申请人 Kabushiki Kaisha Toshiba 发明人 SUGIMAE Kikuko;NISHIHARA Kiyohito;IWATA Yoshihisa;SAITOH Masumi;ICHIGE Masayuki
分类号 G11C16/04;G06F13/40;G11C16/12 主分类号 G11C16/04
代理机构 代理人
主权项 1. A nonvolatile memory device comprising: a semiconductor substrate; a memory cell array unit provided on an upper side of the semiconductor substrate; an integrated circuit unit provided between the memory cell array unit and the semiconductor substrate; and a peripheral circuit unit provided on the semiconductor substrate, the memory cell array unit including: a plurality of first interconnection layers extending in a first direction;a plurality of second interconnection layers extending in a second direction, and the second direction crossing the first direction; anda memory cell provided in a position, and each of the plurality of first interconnection layers and each of the plurality of second interconnection layers crossing each other in the position, the integrated circuit unit including: a first contact electrode electrically connected to one of the plurality of first interconnection layers;a second contact electrode connected to the peripheral circuit unit; anda first switching element connected between the first contact electrode and the second contact electrode, and conduction between the first contact electrode and the second contact electrode being controlled by a control circuit unit provided in the peripheral circuit unit.
地址 Minato-ku JP