发明名称 Three dimensional NAND string with discrete charge trap segments
摘要 A method of making a monolithic three dimensional NAND string includes forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, etching the stack to form at least one opening in the stack, forming a buffer layer over a sidewall of the at least one opening, forming a charge storage material layer over the buffer layer, forming a tunnel dielectric layer over the charge storage material layer in the at least one opening, and forming a semiconductor channel material over the tunnel dielectric layer in the at least one opening. The method also includes selectively removing the second material layers without removing the first material layers and etching the buffer layer using the first material layers as a mask to form a plurality of separate discrete buffer segments and to expose portions of the charge storage material layer.
申请公布号 US9136130(B1) 申请公布日期 2015.09.15
申请号 US201414456515 申请日期 2014.08.11
申请人 SANDISK TECHNOLOGIES INC. 发明人 Wada Takayuki;Fujino Shigehiro
分类号 H01L21/336;H01L21/28;H01L27/115 主分类号 H01L21/336
代理机构 The Marbury Law Group PLLC 代理人 The Marbury Law Group PLLC
主权项 1. A method of making a monolithic three dimensional NAND string, comprising: forming a stack of alternating layers of a first material and a second material different from the first material over a substrate; etching the stack to form at least one opening in the stack; forming a buffer layer over a sidewall of the at least one opening; forming a charge storage material layer over the buffer layer; forming a tunnel dielectric layer over the charge storage material layer in the at least one opening; forming a semiconductor channel material over the tunnel dielectric layer in the at least one opening; selectively removing the second material layers without removing the first material layers; etching the buffer layer using the first material layers as a mask to form a plurality of separate discrete buffer segments and to expose portions of the charge storage material layer; etching the exposed portions of the charge storage material layer using the first material layers as a mask to form a plurality of separate discrete charge storage segments; depositing an insulating material between the first material layers to form alternating layers of insulating material layers and the first material layers; selectively removing the first material layers to expose a sidewall of the discrete buffer segments; etching the discrete buffer segments to expose a sidewall of the discrete charge storage segments; forming a blocking dielectric over the sidewall of the discrete charge storage segments exposed between the insulating material layers; and forming control gate electrodes over the blocking dielectric between the insulating material layers.
地址 Plano TX US