发明名称 Slew rate controlled transistor driver
摘要 A gate driver circuit providing a slew-rate controlled gate control signal while minimizing the stretching of the gate control signal relative to the input control pulse. Control logic effects two threshold voltage levels. When the gate control signal is between the two threshold voltage levels, the slew rate of the gate control signal is controlled such that the gate of the transistor being driven is driven softly. When the gate control signal is less than the first threshold voltage level or greater than the second threshold voltage level, the gate of the transistor being driven is driven hard. In one embodiment, the first and second threshold voltage levels are set such that the on/off threshold of the transistor being driven is between the two threshold voltage levels. Thus the slew rate of the gate control signal is controlled such that the gate of the transistor being driven is driven softly when the transistor being driven is transitioning from off to on, or from on to off, thereby minimizing harmonics. At all other times, the gate control signal rises and falls rapidly so as to minimize the stretching of the gate control signal relative to the input control pulse.
申请公布号 US9137862(B2) 申请公布日期 2015.09.15
申请号 US201314092689 申请日期 2013.11.27
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 Kulkarni Sumeet Prakash;Yin Yan
分类号 H05B37/02;H05B33/08;H03K17/00 主分类号 H05B37/02
代理机构 代理人 Kempler William B.;Cimino Frank D.
主权项 1. An electronic circuit comprising: a slew rate controlled transistor driver circuit operable to drive a transistor and configured to generate a transistor driver signal that rises substantially in step fashion until reaching a first threshold voltage level, whereupon the transistor driver signal rises at a controlled slew rate, comprising a slew rate controlled gate driver circuit operable to drive a gate of a field effect transistor and configured to generate a gate control signal that rises substantially in step fashion until reaching a first threshold voltage level, whereupon the gate control signal rises at a controlled slew rate; further comprising an LED dimmer circuit comprising: a field effect transistor whose gate is coupled to receive the gate control signal from the slew rate controlled gate driver circuit; a light emitting diode whose anode is coupled to the drain of the field effect transistor and whose cathode is coupled to the source of the field effect transistor; and a current source coupled to supply current to the drain of the field effect transistor and the anode of the light emitting diode.
地址 Dallas TX US