发明名称 SHALLOW TRENCH ISOLATION STRUCTURES
摘要 Shallow trench isolation structures are provided for use with UTBB (ultra-thin body and buried oxide) semiconductor substrates, which prevent defect mechanisms from occurring, such as the formation of electrical shorts between exposed portions of silicon layers on the sidewalls of shallow trench of a UTBB substrate, in instances when trench fill material of the shallow trench is subsequently etched away and recessed below an upper surface of the UTBB substrate.
申请公布号 US2015255538(A1) 申请公布日期 2015.09.10
申请号 US201514714779 申请日期 2015.05.18
申请人 International Business Machines Corporation 发明人 Doris Bruce B.;Cheng Kangguo;Haran Balasubramanian S.;Khakifirooz Ali;Kerber Pranita;Kumar Arvind;Ponoth Shom
分类号 H01L29/06 主分类号 H01L29/06
代理机构 代理人
主权项 1. A semiconductor device, comprising: a semiconductor substrate comprising a first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first silicon layer and the second silicon layer; a high-k gate dielectric layer formed on the first silicon layer; a shallow trench isolation structure formed in the semiconductor substrate, the shallow trench isolation structure comprising: a shallow trench formed through the first silicon layer, the buried oxide layer and partially through the second silicon layer;a first liner conformally lining the shallow trench; anda trench fill material disposed in the shallow trench,wherein the first liner is formed of a material having etch selectivity with regard to the trench fill material.
地址 Armonk NY US