发明名称 Memory Redundancy to Replace Addresses with Multiple Errors
摘要 A method and apparatus are provided for error correction of a memory by using a first memory (18), second memory (14), and redundant memory (19) to perform error correction code (ECC) processing on data retrieved from the first memory (18) by using the redundant memory (19) to replace entries in the second memory (14) having repeat addresses, thereby freeing entries in the second memory (14) for use in detecting and managing errors identified by the ECC processing.
申请公布号 US2015242269(A1) 申请公布日期 2015.08.27
申请号 US201414190949 申请日期 2014.02.26
申请人 Freescale Semiconductor, Inc. 发明人 Pelley Perry H.;Hoekstra George P.;Ramaraju Ravindraraj
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项 1. A method comprising: initiating a read operation of a first memory to retrieve data from a specified address; performing an error correction code (ECC) process on the data to detect if the data is erroneous and to provide corrected data; detecting if a second memory has exceeded a storage threshold level; storing the specified address and corrected data in the second memory in an available entry when the second memory has not exceeded the storage threshold level; and transferring one or more redundant entries from the second memory to a redundant memory when the second memory has exceeded the storage threshold level.
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