| 发明名称 |
Test circuit and method for processing a test routine |
| 摘要 |
According to one embodiment, a test circuit is provided comprising a tester configured to perform a test routine comprising a plurality of test commands for testing an electronic circuit, wherein the tester comprises a checker configured to, if a test command of the plurality of test commands is to be performed, check, whether there is currently a state in which performing the test command could lead to a damage of the electronic circuit and configured to, in case it determines that there is currently a state in which performing the test routine could lead to a damage of the electronic circuit, output a signal indicating that performing the test routine could lead to a damage of the electronic circuit. |
| 申请公布号 |
US9116875(B2) |
申请公布日期 |
2015.08.25 |
| 申请号 |
US201213709107 |
申请日期 |
2012.12.10 |
| 申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
Moessler Bernhard;Osterloh Achim |
| 分类号 |
G06F11/00;G06F11/27;G06F11/263;G06F11/22;G06F11/24;G01R31/319 |
主分类号 |
G06F11/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A test circuit comprising:
a tester configured to perform a test routine comprising a plurality of test commands for testing an electronic circuit, wherein the tester comprises a checker configured to, for each of the plurality of test commands to be performed, check prior to each performance of the test command, whether there is currently a state in which performing the test command could lead to a damage of the electronic circuit and configured to, in case it determines that there is currently a state in which performing the test routine could lead to a damage of the electronic circuit, output a signal indicating that performing the test routine could lead to a damage of the electronic circuit. |
| 地址 |
Neubiberg DE |
