Scheme to improve the performance and reliability in high voltage IO circuits designed using low voltage devices

摘要

A high voltage input/output (IO) circuit designed using low voltage devices. The IO circuit receives a first bias voltage and a second bias voltage. The IO circuit includes a pre-reverse switch, a main-driver and a post-reverse switch. The pre-reverse switch includes a first capacitor and a second capacitor. The main-driver includes a first parasitic capacitance and a second parasitic capacitance. The post-reverse switch includes a third capacitor and a fourth capacitor. The first capacitor and the third capacitor counter an effect of coupling by the first parasitic capacitance on the first bias voltage and the second capacitor and the fourth capacitor counter an effect of coupling by the second parasitic capacitance on the second bias voltage.

主权项

1. An input/output (IO) circuit comprising:
a pre-reverse switch configured to receive a pair of input voltages, the pre-reverse switch comprising a first capacitor and a second capacitor; a main-driver, coupled to the pre-reverse switch and a pad, configured to receive a first bias voltage and a second bias voltage and configured to generate a main-driver output voltage, the main-driver having a first parasitic capacitance and a second parasitic capacitance, wherein the first parasitic capacitance is configured to couple the main-driver output voltage to the first bias voltage and the second parasitic capacitance is configured to couple the main-driver output voltage to the second bias voltage; and a post-reverse switch coupled to the main-driver, the post-reverse switch comprising a third capacitor and a fourth capacitor, wherein the first capacitor and the third capacitor counter an effect of coupling by the first parasitic capacitance on the first bias voltage and the second capacitor and the fourth capacitor counter an effect of coupling by the second parasitic capacitance on the second bias voltage.