发明名称 Reduced Generation of Second Harmonics of FETs
摘要 A structure and method for reducing second-order harmonic distortion in FET devices used in applications that are sensitive to such distortion, such as switching RF signals. The asymmetry of the drain-to-body capacitance Cdb and source-to-body capacitance Csb of a FET device are equalized by adding offsetting capacitance or a compensating voltage source.
申请公布号 US2015222260(A1) 申请公布日期 2015.08.06
申请号 US201414174755 申请日期 2014.02.06
申请人 PEREGRINE SEMICONDUCTOR CORPORATION 发明人 Genc Alper
分类号 H03K17/16 主分类号 H03K17/16
代理机构 代理人
主权项 1. A field effect transistor device having reduced second-order harmonic distortion, including: (a) a drain, a source, and a gate arranged on a body such that the gate modulates a conductive channel between a source region and a drain region; and (b) added capacitance coupled to the body and at least one of the source or drain and sized to set the total capacitance from the source to the body to be essentially equal to the total capacitance from the drain to the body.
地址 San Diego CA US