发明名称 |
Method of forming high K metal gate |
摘要 |
A semiconductor device and method of forming the same includes a substrate having a NMOS region and a PMOS region. The method includes forming a dummy gate structure having a stacked sacrificial dielectric layer and a sacrificial gate material layer on the NMOS and PMOS regions. The method further includes concurrently removing the stacked sacrificial dielectric layer and a sacrificial gate material layer to form a groove, and forming a high-K dielectric layer and a first metal gate layer in the grove. The method also includes forming a hard mask over the NMOS region, removing the first metal gate layer and the high-K dielectric layer in the PMOS region to form a channel groove, forming a second high-K dielectric layer and a second metal gate layer in the channel grove, and removing the hard mask. The work function metal layer in the NMOS and PMOS regions can be independently controlled. |
申请公布号 |
US9099338(B2) |
申请公布日期 |
2015.08.04 |
申请号 |
US201414305969 |
申请日期 |
2014.06.16 |
申请人 |
Semiconductor Manufacturing International (Shanghai) Corporation |
发明人 |
Han Qiuhua |
分类号 |
H01L21/8238;H01L27/092 |
主分类号 |
H01L21/8238 |
代理机构 |
Kilpatrick Townsend and Stockton LLP |
代理人 |
Kilpatrick Townsend and Stockton LLP |
主权项 |
1. A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate having a NMOS region and a PMOS region; forming dummy gate structures having a stacked sacrificial gate material layer over a sacrificial dielectric layer in the NMOS and PMOS regions; concurrently removing the sacrificial gate material layer and the sacrificial dielectric layer to form a groove in the dummy gate structure in the NMOS region and a groove in the dummy gate structure in the PMOS region; forming a first high-K dielectric layer in the grooves of the NMOS and PMOS regions and a first metal gate over the first high-K dielectric layer; forming a hard mask over the NMOS region; removing the first metal gate layer and the first high-K dielectric layer of the dummy gate structure in the PMOS region using the hard mask as a mask to form a channel groove in the semiconductor substrate; forming a second high-K dielectric layer in the channel groove; forming a second metal gate over the second high-K dielectric layer; and removing the hard mask. |
地址 |
Shanghai CN |