发明名称 Inverter, NAND gate, and NOR gate
摘要 Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.
申请公布号 US9099991(B2) 申请公布日期 2015.08.04
申请号 US201314049800 申请日期 2013.10.09
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE;KONKUK UNIVERSITY INDUSTRIAL COOPERATION CORP. 发明人 Park Sang Hee;Hwang Chi Sun;Yoon Sung Min;Oh Him Chan;Park Kee Chan;Ren Tao;Leem Hong Kyung;Oh Min Woo;Kim Ji Sun;Pi Jae Eun;Kim Byeong Hoon;Yu Byoung Gon
分类号 H03K19/20;H03K19/094;H03K3/012 主分类号 H03K19/20
代理机构 Rabin & Berdo, P.C. 代理人 Rabin & Berdo, P.C.
主权项 1. A NAND gate, comprising: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate and a seventh thin film transistor outputting the first power voltage to the output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor transferring a ground voltage according to a first input signal applied to a gate and a tenth thin film transistor outputting the ground voltage transferred from the fifth thin film transistor to the output terminal according to a second input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the first input signal and applying the second power voltage or the ground voltage to the gate of the seventh thin film transistor according to the second input signal; wherein the pull-up driver includes: a first thin film transistor in which a gate is connected to a first node, a drain is connected to the second power voltage, and a source is connected to a second node; a third thin film transistor in which a gate is connected to a first input terminal, a drain is connected to the first node, and a source is connected to the ground voltage.
地址 Daejeon KR