发明名称 Systems and methods for adjacent track interference based re-writing
摘要 Systems and method relating generally to data processing, and more particularly to systems and methods for confirming data validity. In one case, a system is disclosed that includes an adjacent track interference confirmation circuit. The adjacent track interference confirmation circuit is operable to receive an indication of an adjacent track interference; determine a causal connection between the adjacent track interference and a mis-alignment of a read head and a track on a storage medium from which a data set corresponding to the indication of the adjacent track interference is derived; and provide a re-write signal where even after reduction of the mis-alignment the indication of adjacent track interference repeats.
申请公布号 US9099157(B1) 申请公布日期 2015.08.04
申请号 US201414268741 申请日期 2014.05.02
申请人 Avago Technologies General IP (Singapore) Pte. Ltd. 发明人 Hwang Eui Seok;Yang Shaohua
分类号 G11B27/36;G11B20/10;G11B20/18 主分类号 G11B27/36
代理机构 Hamilton DeSanctis & Cha 代理人 Hamilton DeSanctis & Cha
主权项 1. A data processing system, the system comprising: an adjacent track interference confirmation circuit operable to: receive an indication of an adjacent track interference;determine a causal connection between the adjacent track interference and a mis-alignment of a read head and a track on a storage medium from which a data set corresponding to the indication of the adjacent track interference is derived; andprovide a re-write signal where even after reduction of the mis-alignment of the read head and the track, the indication of the adjacent track interference repeats.
地址 Singapore SG