Methods of Packaging and Dicing Semiconductor Devices and Structures Thereof

摘要

Methods of packaging and dicing semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging and dicing semiconductor devices includes a first cutting process performed on a wafer to form a groove passing through a passivation layer and an interconnect structure on a scribe line region and a portion of a semiconductor substrate on the scribe line region. Next, a molding compound layer is formed on a frontside of the wafer to fill the groove. After performing a grinding process on a backside of the wafer to thin down the semiconductor substrate, a second cutting process is performed on the wafer to separate the individual dies. The second cutting process cuts through the molding compound layer in the groove and the semiconductor substrate underlying the groove.

主权项

1. A method of forming a packaged semiconductor device, comprising:
receiving a wafer comprising a first die region, a second die region and a scribe line region between the first die region and the second die region, wherein the wafer comprises an interconnect structure on a semiconductor substrate, a plurality of contact pads on the interconnect structure, a passivation layer on the interconnect structure and overlying the plurality of contact pads, a protection layer on the passivation layer, a plurality of post-passivation interconnect (PPI) structures on the protection layer and electrically connected to the plurality of contact pads, and at least one bump physically contacting at least one of the plurality of PPI structures; performing a first cutting process on the wafer to form a groove passing through the passivation layer, the interconnect structure and a portion of the semiconductor substrate on the scribe line region; forming a molding compound layer on a frontside of the wafer to cover the protection layer and the PPI structures and fill the groove and surround the at least one bump; performing a grinding process on a backside of the wafer to thin down the semiconductor substrate; and performing a second cutting process on the wafer to separate the first die region from the second die region, wherein the second cutting process cuts through the molding compound layer in the groove and the semiconductor substrate underlying the groove.