| 发明名称 |
Low power current-voltage mixed ADC architecture |
| 摘要 |
The present disclosure includes systems and techniques relating to low power current-voltage mixed analog to digital converter (ADC) architecture. In some implementations, an ADC device includes a comparator array configured to receive an input analog voltage signal during a sample phase and a collection of reference voltages during a hold phase, a capacitor configured to receive the input analog voltage signal during the sample phase and to act as a feedback capacitor during the hold phase, an opamp coupled with the capacitor, and a transistor array configured to be powered by the opamp and activated by the comparator array to add or subtract currents to form a residue output voltage signal, which corresponds to the input analog voltage signal, used in analog to digital conversion of the input analog voltage signal. |
| 申请公布号 |
US9088295(B1) |
申请公布日期 |
2015.07.21 |
| 申请号 |
US201313888030 |
申请日期 |
2013.05.06 |
| 申请人 |
Marvell International Ltd. |
发明人 |
Hatanaka Shingo;Jamal Shafiq M.;Lin Hung Sheng;Carnu Ovidiu |
| 分类号 |
H03M1/38;H03M1/34 |
主分类号 |
H03M1/38 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An analog to digital converter (ADC) device comprising:
a comparator array configured to receive an input analog voltage signal during a sample phase and a collection of reference voltages during a hold phase; a capacitor configured to receive the input analog voltage signal during the sample phase and to act as a feedback capacitor during the hold phase; an opamp coupled with the capacitor; and a transistor array configured to be powered by the opamp and activated by the comparator array to add or subtract currents to form a residue output voltage signal, which corresponds to the input analog voltage signal, used in analog to digital conversion of the input analog voltage signal. |
| 地址 |
Hamilton BM |
