发明名称 SSTA WITH NON-GAUSSIAN VARIATION TO SECOND ORDER FOR MULTI-PHASE SEQUENTIAL CIRCUIT WITH INTERCONNECT EFFECT
摘要 In the present invention the issue of SSTA in multi-phase sequential circuit with cross-talk in consideration of non-uniform timing constraint and process variations up to the 2nd order is proposed. Use forward breadth first search to calculate the accumulated probabilities at each node for clock phases and edge probability with respect to input and output clock phases, followed by backward depth first traversal to find all critical paths with their probabilities greater than user specified threshold. A method is proposed to pre-characterize the timing library including second order variations. For cross-talk, the poles and residues of admittance matrix and voltage transfer are carried out to 2nd order variations. Effective capacitances and waveforms at interconnect input or driver's immediate output are calculated to 2nd order variations. Delays at victim outputs are then calculated to 2nd order variations and fed back to SSTA, the probability of path occurrence can be calculated accurately.
申请公布号 US2015199462(A1) 申请公布日期 2015.07.16
申请号 US201514591852 申请日期 2015.01.07
申请人 Chang Mau-chung 发明人 Chang Mau-chung
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A computer-implemented method for performing SSTA of a circuit with multi-phase sequential elements with interconnect, comprising the computer-implemented steps of: using path analysis including both forward bread first search and backward depth first traversal considering constraint with multi-phase sequential elements to generate critical paths in terms of probability of path occurrence; and considering gate and interconnect delays with non-Gaussian variation up to quadratic order in the path analysis; and handling cross-talk issue with non-Gaussian variation up to quadratic order in the path analysis; and characterizing cells with non-Gaussian variation up to quadratic order.
地址 Hillsborough CA US