发明名称 Memory management control operation for interlaced sequences
摘要 A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).
申请公布号 EP2894858(A1) 申请公布日期 2015.07.15
申请号 EP20140193471 申请日期 2003.07.15
申请人 PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA 发明人 SCHLOCKERMANN, MARTIN;SCHUUR, BERNHARD;KADONO, SHINYA
分类号 H04N7/32;H04N19/423;H04N7/26;H04N7/36;H04N7/50;H04N19/127;H04N19/16;H04N19/172;H04N19/573;H04N19/58 主分类号 H04N7/32
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