3D CHIP TESTING THROUGH MICRO-C4 INTERFACE

摘要

The embodiments of the present invention relate to semiconductor device manufacturing, and more particularly to structures and methods of directly testing semiconductor wafers having micro-solder connections. According to one embodiment of the present invention, a method of forming a pattern of micro-solder connections coupled with a through substrate via (TSV) that can be directly tested by electrical probing, without the use of a testing interposer, is disclosed. According to another embodiment, a method of testing the pattern of micro-solder connections is disclosed. According to another embodiment, a novel electrical probe tip structure, having contacts on the same pitch as the pattern of micro-solder connections is disclosed.

主权项

1. A method, comprising:
forming a through substrate via (TSV) through an entire thickness of an integrated circuit (IC) chip, the TSV electrically connecting a first surface of the IC chip to a second surface on an opposite side of the IC chip; forming a pattern of micro-solder connections around the TSV on the first surface of the IC chip, wherein a center of an individual micro-solder connection in the pattern is separated from a center of another individual micro-solder connection by a distance of approximately 62 μm, and wherein the pattern of micro-solder connections allows the IC chip to be electrically tested by directly contacting the micro-solder connections with an electrical probe tip.