发明名称 3D memory structure and manufacturing method of the same
摘要 A 3D memory structure and a manufacturing method of the same are provided. The 3D memory structure includes a substrate, a plurality of stacked structures, a plurality of charge trapping layers, a plurality of bit lines, and a plurality of stair structures. The stacked structures are formed on the substrate, and each of the stacked structures includes a plurality of gates and a plurality of gate insulators alternately stacked on the substrate. The charge trapping layers are formed on the sidewalls of the stacked structures. The bit lines are arranged orthogonally over the stacked structures, the surfaces of the bit lines crossing the stacked structures for forming a plurality of memory elements. The stair structures, each electrically connected to the different gates, are stacked on the substrate.
申请公布号 US9076684(B1) 申请公布日期 2015.07.07
申请号 US201314144640 申请日期 2013.12.31
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 Lai Erh-Kun
分类号 H01L29/792;H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119;H01L27/115 主分类号 H01L29/792
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A 3D memory structure, comprising: a substrate; a plurality of stacked structures formed on the substrate, each of the stacked structures comprises: a plurality of gates and a plurality of gate insulators alternately stacked on the substrate; a plurality of charge trapping layers formed on sidewalls of the stacked structures; a plurality of bit lines arranged orthogonally over the stacked structures, surfaces of the bit lines crossing the stacked structures for forming a plurality of memory elements; a plurality of stairstep structures stacked on the substrate, each of the stairstep structures electrically connected to different ones of the gates; and a plurality of gate contact structures, each of the gate contact structures electrically connected to the corresponding gate via each of the stairstep structures.
地址 Hsinchu TW