发明名称 |
SEMICONDUCTOR DEVICE INCLUDING GATE ELECTRODE PROVIDED OVER ACTIVE REGION IN P-TYPE NITRIDE SEMICONDUCTOR LAYER AND METHOD OF MANUFACTURING THE SAME, AND POWER SUPPLY APPARATUS |
摘要 |
A semiconductor device includes a nitride semiconductor stacked structure including a carrier transit layer and a carrier supply layer; a p-type nitride semiconductor layer provided over the nitride semiconductor stacked structure and including an active region and an inactive region; an n-type nitride semiconductor layer provided on the inactive region in the p-type nitride semiconductor layer; and a gate electrode provided over the active region in the p-type nitride semiconductor layer. |
申请公布号 |
US2015187907(A1) |
申请公布日期 |
2015.07.02 |
申请号 |
US201514645317 |
申请日期 |
2015.03.11 |
申请人 |
Transphorm Japan, Inc. |
发明人 |
Yamada Atsushi |
分类号 |
H01L29/66;H01L21/02;H01L29/205;H01L21/56;H01L29/20 |
主分类号 |
H01L29/66 |
代理机构 |
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代理人 |
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主权项 |
1. A method of forming a semiconductor device comprising:
forming a stage mounting a semiconductor chip, the forming comprising:
providing a nitride semiconductor stacked structure comprising a carrier transit layer and a carrier supply layer;providing a p-type nitride semiconductor layer over the nitride semiconductor stacked structure, the p-type nitride semiconductor layer comprising an active region and an inactive region;providing an n-type nitride semiconductor layer on the inactive region in the p-type nitride semiconductor layer; andproviding a gate electrode over the active region in the p-type nitride semiconductor layer; wherein the method further comprises connecting a gate lead to the gate pad in the semiconductor chip; connecting a source lead to the source pad in the semiconductor chip; connecting a drain lead to the drain pad in the semiconductor chip; and providing an encapsulation resin; wherein the n-type nitride semiconductor layer is depleted, causing it to have fixed positive charges, and the fixed positive charges in the n-type nitride semiconductor layer cause a conduction band energy level at an interface between the carrier transit layer and the carrier supply layer to be comparable to that in a similar structure which lacks the p-type nitride semiconductor layer and the n-type nitride semiconductor layer. |
地址 |
Yokohoma JP |